ABSTRACT
To study Single-Electron Transistor (SET) simulation methods and modeling techniques, first, it is important to remember the basic concepts regarding SET operation. Three methods are commonly applied when developing the SET models: Monte Carlo, Master Equation of single-electron tunneling, and Macromodeling for Simulated Program with Integrated Circuits Emphasis. This chapter aims to present and discuss each one of these methods. Due to low power consumption, high switching capacity, and low occupied area, Single-Electron (SE) devices are ideal for implementing circuits in Very Large Scale Integration. Aiming a more efficient simulation, macromodels were developed to reduce the computational cost of techniques like Master Equation and Monte Carlo. Results obtained using Simulation Of Nanostructures are often used as benchmark in the development of new models and simulation techniques for SE devices. Traditional electronic devices may, in a near future, stop providing advances and performance improvements due to the miniaturization tendency.
