ABSTRACT
A broad range of time measurement functions in high-energy/nuclear physics experiments can be implemented in an FPGA directly. There are two types of practical TDC structures in an FPGA with different timing resolutions and complexities. The ‹rst TDC scheme is based on a multiphase clock, and typically the input of the TDC is sampled by four registers with four phases of the clock as shown in Figure 6.1.
