ABSTRACT
Fixed-point multiplication is more complex than either addition or subtraction. This chapter discusses multiply signed and unsigned operands, including the sequential add-shift method, the Booth algorithm, bit-pair recoding, an array multiplier, table lookup, read-only memory-based multiplication, and multiple-operand multiplication. Two versions of a sequential add-shift multiplier will be designed using Verilog Hardware Description Language — both versions will be implemented using behavioral modeling. The Booth algorithm is an effective technique for multiplying operands that are in 2s complement representation, including the case where the multiplier is negative. The speed increase of the Booth algorithm depended on the bit configuration of the multiplier and is, therefore, data dependent. A hardware array multiplier that permits a very high speed multiply operation for unsigned operands and positive signed operands. For signed operands, the multiplier must be positive — the multiplicand can be positive or negative. The multiplication of two n-bit operands generates a product of 2n bits.
