ABSTRACT
FPGA. (d) FALSE: Formal verification is a mathematic method of assuring that a design
meets its timing requirements. (e) TRUE: Floorplanning software allows you to place large chunks of your design
in specific locations on the chip. (f) TRUE: SRAM-based FPGAs are programmed in the system. (g) TRUE: Serial PROMs are often used to load a design into an SRAM-based
FPGA.
