ABSTRACT

In any technology there will always be some trade-off between power and gate delay, as devices will switch faster if driven harder. The operation point on this power delay curve is sometimes fixed in production, alternatively it may be varied using resistors external to the chip. The transistor-transistor logic market is rapidly declining; the replacement technologies are provided by customisable chips, which provide a higher packing density for small random logic. The channel is formed from either n- or p-type charge induced in doped silicon of the opposite polarity, giving the nmos and pmos technologies. Although nmos is used, the third and major mos technology uses both nmos and pmos transistors. Parallel computers, especially large replicated designs, are very well suited to the continuous revolution that is taking place in the micro-electronics industry. Communication in an electronic digital computer is the propagation of ‘square’ and hence high-frequency electronic signals, along wires or printed circuits, or in impurity patterns in silicon.