Downscaling of the memory cell of the conventional dynamic random access memory (DRAM) has become more and more difficult because the storage capacitance of the memory cell must be kept constant. The stacked capacitor cell with metal/high-e/metal capacitor has been used down to 50 nm generation. However, the development of sub-40 nm technologies has become tremendously difficult, and manufacturable solutions are not known. This is called the red brick wall of DRAM technologies.1 To overcome these difficulties, several kinds of capacitor-less DRAM cell have been proposed and developed.2-18 Floating body cell (FBC) is a promising candidate from the view point of the simplest structure and its scalability. Based on the fabrication and measurement results shown in Chapter 4, the scalability of FBC down to 32 nm technology node will be discussed.