ABSTRACT
Power combining can improve output power and PAE at 60GHz [192, 193]. Numerous power combining techniques have been published for 60GHz CMOS applications [194, 192, 193, 195, 196, 197]. The most straightforward method is to use a Wilkinson power divider/combiner as implemented in [194]. It has the advantage of easy implementation, low loss, and good isolation between ports. However, the required λ/4 transmission like (T-line) occupies a large area. Two modified techniques are implemented in [193] and [192]. The first one merges the power combining/dividing function into the existing matching network, which is still bulky in area. The latter one, on the other hand, uses a zero-degree power divider instead, which eliminates the resistor and only requires equal-length short T-line and is thus much more compact. However, to achieve high output power, it still requires many branches to be combined with a large power combiner area due to its 1D power combining nature. Another widely explored device for power combining is Transformer. The distributed active transformer (DAT) has been proven as an efficient method for power combining [195, 196, 198]. However, the DAT topology limits the number of combined transistors, which in turn limits the achievable output power. As a result, to achieve high output power, either a larger DAT size needs to be adopted or multiple branches need to be used, both of which degrade the output power density due to its 1D power combining nature. One 2D power combining is introduced in [199], where an electrical “funnel” is constructed by 2D T-line network, which still suffers from bulky size for impedance transformation, low PAE and difficulty of matching.
