ABSTRACT
Abstract: This paper will discuss the concept design and potential utilisation of a novel architecture reconfigurable integrated circuit (IC) aimed at supporting the teaching of Integrated Circuit test engineering concepts. The objective is to provide a single configurabJe device that allows for the downloading of specific circuit designs, along with specific target circuit f~lllits into a digital configurable array. As such, it can provide the potential to be a highly flexible and interactive device for IC hardware tcst strategy development, acting as a single Ie based hardware laboratory, and may complement a corresponding fault simulation study. This paper will discuss the design of a demonstrator version of the array whose functionality may be extended. The potential users will be persons investigating IC test concepts and techniques.
