ABSTRACT
One of the most attractive features of silicon is the prospect of full integration of optical and electronic devices on the same substrate.
Transistor size continues to shrink, a trend driven by the economic bene„t of having a larger number of circuits from a single silicon wafer. Ultra-large scale integration (ULSI), with the number of transistors per chip exceeding 1 billion (109), has increased the economic incentive to utilize silicon real estate e¢ciently. While today’s electronic chips boast critical dimensions of 35 nm [17], the dimensions of optical waveguides have a hard lower limit of more than 200 nm, set by the optical wavelength in silicon [18,19]. It is therefore necessary to develop innovative fabrication technologies that would make the integration of optical and electronic devices viable on silicon substrates, without compromising the real-estate economics of wafer manufacturing. Furthermore, in order to utilize the foundry capabilities in silicon, it is necessary that these technologies be compatible with the well-established CMOS processing techniques.
