ABSTRACT
This chapter presents a blind and invisible video watermarking scheme for high efficienty video coding (HEVC) standard. The watermarking unit would be a integral of HEVC seBlindcure encoder to generate the bit stream. The development of the watermarking system is in demand mainly due to concerns over Intellectual Property Right. HEVC based real-time watermarking could mitigate issues if the watermark is inserted at the time of capturing the video. The chapter analyzes the proposed video watermarking with results on MATLAB and a hardware platform. The hardware results of proposed schemes are covered with field programmable gate array (FPGA) and application specific integrated circuit (ASIC) implementation. The proposed watermarking algorithm is initially simulated by MATLAB to validate the performance. The architecture of proposed system is subsequently implemented on hardware to measure the real-time performance. The hardware performance of proposed algorithm is demonstrated with FPGA prototyping and ASIC Implementation.
