ABSTRACT

Scan testing is applied to sequential testing, that is, testing of sequential designs. It relates to the ability of shifting data in and out of all sequential states. One of the drawbacks when scan is used is the necessary time for scan-in and scan-out operations. As a widely used scan technique, boundary-scan provides an access to internal structures knowing that little logic is directly accessible from primary inputs and primary outputs. For a better trade-off performance/cost, a scan technique called partial scan is proposed. Only a subset of memory elements is included in the considered scan chain. A scan design can serve as a support for a complete built-in-test solution. Given several examples of benchmarks, such a high-level scan insertion approach was shown efficient since the cost of inserting a scan design is significantly reduced when compared to classical scan techniques that operate at a low-level design.