ABSTRACT
One of the fastest spreading methods of modern communication is satellite laser optical links. There are two reasons why we turn our attention to these systems: Energy efficiency and Speed. A more precise classification requires the use of more sophisticated algorithms which apply techniques capable of adapting to channel noise. To implement this step parallel-hierarchical networks may be used, which have the property of adaptability while maintaining a simple mathematical apparatus, which is advantageous for implementation on a FPGA. The main task while parallelising the memory access processes is increasing the memory speed as well as the size of the access bus. Under this approach, there are two kinds of work with memory: using serial EC of RAM and creation of a dedicated RAM device on PLD. Modern PLD micro schemes are equipped with specialised interfaces for work with external memory chips.
