ABSTRACT
Digital signal processing (DSP) is an area witnessing continuous significant advancements both in terms of software approaches and hardware platforms. Some of the most usual functionalities in this domain are digital filters, encoders, decoders, correlators, and mathematic transforms such as the fast Fourier transform (FFT). Since the advent of the first field-programmable gate arrays (FPGAs) in the 1980s, one of the main goals of vendors has been to ensure their devices are capable of efficiently implementing binary arithmetic operations. As FPGAs became increasingly popular, new application niches appeared requiring new specialized hardware resources. Arithmetic Logic Unit (ALU) in conventional DSPs usually include from one to four MAC units operating in parallel. The basic FPGA implementation of multiply–accumulate (MAC) units consists in building adders and multipliers using distributed logic, and combining them with embedded memory blocks, which act as accumulators and where coefficients are stored.
