A Novel Comparative Study of Different Coding Algorithms and Implementation Issues through FPGA Technology for Wireless Vehicular Applications
Communication requirements over vehicular networks involve sending data over noisy channels, which results in introducing erroneous samples during transmission from the source to the receiver. In order to overcome this and achieve reliable transmission, error detection and correction techniques are utilized, which enable reconstruction of the original data. Such techniques are typically adopted in every communication scheme nowadays; therefore, research is constantly focused on inventing increasingly better performing schemes, with an ambition to ultimately approach the channel capacity (Shannon limit). The invention of low-density parity check codes (LDPC) codes and turbo coding has had a major impact on telecommunication systems due to their ability to perform close to the Shannon limit by using an iterative algorithm. The purpose of this work is the analysis, the simulation, and the performance improvement of the physical layer for the automotive WLAN standard including the aforementioned coding schemes based on IEEE 802.11p specifications. Many different decoding techniques have been tried and tested for their performance under a vehicular noisy channel by computer-based simulations under modulation schemes and transmitted through additive white Gaussian noise (AWGN) and Rayleigh fading channel models. Finally, algorithms with the best ratio of performance versus complexity are chosen to be implemented on a FPGA platform of the Xilinx Virtex-4 family. The designs are analyzed in detail, describing their components and their operation and, ultimately, the device utilization required.