ABSTRACT
This chapter outlines the evolution of the nonvolatile memories (NVMs) process technology from its inception to the turn of the century. The NVM technology is an extension of the silicon based FET microelectronics process and integration technology, and closely followed its evolution and transition. The chapter covers unique technology features associated with NVM device requirements and assumes scaled conventional silicon-gate CMOS technology base for the current technology and products. The scaled polysilicon-gate CMOS devices and related integration schemes addressed scaling issues such as short-channel effects, device series resistances, thermal budget management for shallow junction technology, and impurity profile control and reliability. NVM technology uniquely requires high-voltage generation and transmission within a scaled low voltage CMOS base. High voltages are required within the memory array for programming and erasing the memory bits. A typical NVM floating-gate technology may consist of three levels of polysilicon and two levels of metal processes.
