ABSTRACT
The lifetime estimation for power semiconductors individually is a mature technology, and many empirical lifetime estimation models have been develo-ped based on abundant test data by several projects, such as LESIT project (Held et al., 1997) and the German project, RAPSDRA (Bayerer et al., 2008). These approaches analytically estimate the lifetime of a device module in terms of the number of cycles to failure Nf considering variable factors such as cyclic junction temperature variations ∆Tj, medium junction temperature, frequency and wire-bond current. These descriptive models are purely statistical analyses and have proven to be unsatisfactory since the aging effects due to the amplitude of junction temperature variations ∆Tj are not well considered (Lai et al., 2015), thus these approaches are not yet suitable in power fluctuation condition.
