ABSTRACT

With the evolution toward ultra-deep-submicron and nanometer CMOS technologies [1], the design of complex integrated systems (ASICs, SoCs, and SiPs), is emerging not only in consumermarket applications such as telecom and multimedia, but also in more traditional application domains like automotive and instrumentation. Driven by cost reduction, these markets demand low-cost, optimized and highly integrated solutions with very challenging performance specications. ese integrated-systems are increasingly mixed-signal designs, embedding on a single die high-performance analog or mixed-signal blocks and possibly sensitive RF front-ends, together with complex digital circuitry-(multiple processors, some logic blocks, and several large memory blocks) that form the core of most electronic systems today. In addition to the technical challenges related to the increasing design complexity and the problems posed by analog-digital integration, shortening time-to-market constraints put pressure on the design methodology and tools used to design these systems.