ABSTRACT
Layout for digital integrated circuits (ICs) is usually regarded as a dicult task because of the scale of the problem: millions of gates, kilometers of routed wires, complex delay, and timing interactions. Analog designs and the analog portions of mixed-signal systems-on-chips (SoCs) are usually much smaller-up to 100 devices in a cell, usually less than 20,000 devices in a complete subsystem-and yet they are nothing if not more dicult to lay out. Why is this? e answer is that the complexity of analog circuits is not so much due to the number of devices, as to the complex interactions among the devices, the various continuous-valued performance specications, the fabrication process, and the operating environment.
