ABSTRACT
This chapter describes the three-dimensional (3D) integration of network-on-chip (NoC) in detail. It also describes the pros and cons of 3D integration and explores the design and evaluation of 3D NoC architecture. Performance and cost evaluation of 3D NoC architecture is performed with self-similar and application-specific traffic and compared with that of two-dimensional (2D) NoC counterpart. B. S. Feero and P. P. Pande reported that a ciliated 3D mesh structure has slightly higher throughput than a 2D mesh-based NoC, but considerably lesser throughput than that of fully connected 3D mesh and stacked mesh structures. The chapter proposes an extension of mesh-of-tree topology for the 3D environment and carries out performance and cost benefits of the proposed 3D structure over its 2D counterpart. It considers a dual video object plane decoder application consisting of 32 cores where two video object plane decoders are running in parallel.
