ABSTRACT

In this chapter, the authors demonstrate vertically aligned high-density growth of carbon nano-tubes (CNT) on sputtered titanium-nitride (TiN) layers at temperatures as low as 500°C. They find that specific processing steps used in silicon technology on an exposed TiN diffusion barrier can have a large impact on the CNT growth at low temperature. The authors discuss the processing steps we found to be harmful to CNT growth, and a method to prevent damage. Using this, they demonstrate integrated top-down CNT via structures to measure the bundle resistance of the vertically aligned CNT grown at 500°C. The authors also demonstrate that it is possible to use plasma-enhanced chemical vapor deposited (PECVD) silicon oxide and nitride to cover CNT for bottom-up integration. One promising application within microelectronics that has received a lot of attention is the use of aligned CNT as vertical interconnects. For low-temperature dielectric deposition, PECVD is the preferred method in the semiconductor industry.