ABSTRACT

The silicon nanowire field-effect transistor (NWFET) has been extensively studied because of its potential for further scaling down of the complementary metal-oxide semiconductor technology. In particular, it has been reported that the NWFET with gate-all-around structure shows excellent gate controllability by which low leakage current and effective suppression in a short channel effect are guaranteed. The NWFET, however, in spite of its numerous advantages, has a few technical issues such as parasitic resistance and capacitance components due to the structural particularity. Accurate extraction of RSD, therefore, is an important issue for the characterization of NWFET. The SiGe layer is embedded to basically sustain a nanowire channel and improve the electrical characteristics of the p-type NWFET by compressive stress. In the NWFET structure investigated, owing to the application of the SiGe layer under the source/drain region as a compressive stressor to the nanowire channel, p-type NWFET exhibits greatly enhanced device performance with a slightly degraded n-type NWFET.