ABSTRACT
The increasing demand for compactness and speed of digital circuits and the necessity of integration of the digital back end electronics with radio frequency front ends calls for exploiting deep submicron technologies in radio frequency circuit design. The chapter describes the building blocks of the receiver with three parameters including noise, nonlinearity, and gain. The sensitivity of the overall performance of the receiver to variations of noise, nonlinearity, and gain of building blocks is calculated. Bit Error Rate is defined as the goal function of the receiver and is described as a function of total noise, total nonlinearity, and input impedance of the receiver. The chapter describes the performance requirements of a typical 60 GHz receiver for indoor applications. It determines the sensitivity of the overall performance of the receiver to the performance of the building blocks. The chapter presents the design of two 60 GHz receivers including and excluding the analog-to-digital converter is explored using different system-level design guidelines.
