ABSTRACT
This chapter explores several hardware realizable techniques for converting a binary representation into a two-dimensional logarithmic number system two-dimensional logarithmic number system (2DLNS) representation. The techniques are based on the reversal of the multidimensional logarithmic number system (MDLNS)-to-binary converter. Since the table method for converting single-digit 2DLNS to binary is quite fast and can be implemented efficiently in hardware, it is only logical to try to reverse this process, i.e., to convert a binary two's complement representation to a single-digit 2DLNS. The input to the single-digit 2DLNS to binary lookup table (LUT) is the second base exponent, b, and the outputs are the mantissa and the exponent. To reverse the process, the input to the LUT is the mantissa, M(b).. The chapter discusses the design of a novel conversion LUT with table size O(2R). In this approach author changes the address decode system from exact matching to range matching. They refer this as a range-addressable LUT (RALUT).
