ABSTRACT
This chapter briefly explains fixed-point addition, fixed-point subtraction, fixed-point multiplication, decimal addition, and decimal subtraction by designing select arithmetic circuits using Verilog hardware description language (HDL). The sections on fixed-point arithmetic consist of the following arithmetic circuits: a high-speed full adder, a 4-bit ripple adder, a 4-bit carry lookahead adder, an adder/subtractor, a Booth algorithm multiplier, and an array multiplier. The sections on decimal arithmetic consist of the following circuits: a decimal adder and a decimal adder/subtractor. Various modeling styles are used to design both fixed-point and decimal circuits, including built-in primitives, dataflow modeling, behavioral modeling, and structural modeling. The most commonly used code in binary-coded decimal (BCD) arithmetic is the 8421 code, which allows binary fixed-point arithmetic to be used. In fixed-point arithmetic, each bit is treated as a digit, whereas in decimal arithmetic a digit consists of four bits encoded in the 8421 code.
