ABSTRACT
The roots of most commercial silicon germanium (SiGe) BiCMOS processes lie in a tradition of bipolar
technology developed relatively slowly over multiple generations. Historical progress of traditional
bipolar technology was quickly outpaced by CMOS processes in the 1990s with ever-shrinking line-
widths in state-of-the-art CMOS fabs. A step-up to 200mm wafers for BiCMOS technology created
a gap between older generation bipolar technologies, which were optimized at a time when the addition
of CMOS compromised bipolar performance, and the new generation of BiCMOS technologies that
took full advantage of the tool capabilities in an advanced CMOS fab [1,2]. Improved capabilities
included better control of thermal steps due to vertical furnaces, new temperature monitoring schemes
for rapid thermal annealing, higher selectivity etches for silicon, oxide and nitride, in-line SEM
metrology for monitoring of critical structures, and tighter photomask alignment tolerances. Along
with this fundamentally improved equipment capability came the development of sophisticated
factory automation that made it possible to run multiple process technologies with an increasing
number of photomask layers at consistently high fab yield. In this new environment, the bipolar
transistor was able to realize the full benefit of the addition of silicon germanium to the base structure
because lateral scaling reduced performance-limiting parasitic capacitance and resistance, while
thermal budget control enabled manufacturable ultra-shallow junctions that were needed for vertical
scaling in high-speed bipolar transistors. Acceleration of the performance curve for SiGe bipolar
transistors has once again placed the bipolar device as the highest speed transistor available on
silicon [3].
