ABSTRACT
Thermal phenomena may adversely affect electrical functionality and performance of semiconductor devices, as well as reducing their reliability. As transistors become more three dimensional, and are increasingly isolated from the thermal sink represented by the Si substrate, removal of heat from the active region of the device is expected to become problematic, resulting in increased self-heating effects. Accurate thermal modeling and design of microelectronic devices and thin film structures at micro- and nanoscales poses a challenge to the thermal engineers who are less familiar with the basic concepts and ideas in sub-continuum heat transport. Experimental methods for characterizing the thermal conductivity of thin films and nanowires have been developed and they are still evolving. One way to estimate the impact of micro/nanoscale effects is to use the modified thermal conductivity values for thin silicon and copper layers in conventional thermal simulation tools based on the continuum theory or the diffusion equation.
