ABSTRACT
This chapter introduces the methodology of the system-level design from the viewpoint of the designers of Network on Chip. The entire design process of a system can be split into many stages; each stage has a design input and a design output. Each stage needs a model of system or model of computation to map its design input to the design output. The chapter classifies models based on two aspects: communication and behavior. Transaction-level modeling (TLM) is a concept in the domain of system design, which is devised for easy modeling and fast simulation. It focuses on TLM based on SystemC. The chapter also explains how transaction-level models can actually be incorporated with system design. It also focuses on validation and verification. The most popular way of verification and validation is simulation. The chapter deals with the different ways of simulation. It introduces representative formal methods instead of enumerating complex mathematical formulas.
