chapter  10
36 Pages


The previous three chapters have been concerned with the Ordered Transactions strategy, which is a hardware approach to reducing IPC and synchronization costs in self-timed schedules. In this chapter and the following two chapters, we discuss software-based strategies for minimizing synchronization costs in the final implementation of a given self-timed schedule. These software-based techniques are widely-applicable to shared-memory multiprocessors that consist of homogeneous or heterogeneous collections of processors, and they do not require the availability of hardware support for employing the OT approach or any other form of specialized hardware support.