ABSTRACT
This chapter explores some of the most important formulas for balancing hardware intensity and power supply voltage derived in V. Zyuban and P. Strenski, and provides a graphical interpretation of the major result. It discusses other power–performance metrics that are commonly used in the architectural community and some common mistakes made by architects when applying these metrics. The chapter presents some examples of using the architectural energy-efficiency criterion. It analyzes common approaches to trading power and performance in the design of processor cores for systems on chip, such as varying the power supply, hardware intensity, and architectural complexity. A criterion for optimizing the core architecture was described which is useful for guiding the iterative architectural optimization process that leads to the optimal balance between the architectural complexity, hardware intensity and power supply. Changing the processor architecture is another way to make trade-offs between performance and energy.
