ABSTRACT
Systems on chip differ from wide-area networks because of local proximity and because they exhibit much less nondeterminism. In particular, micronetworks have a few distinctive characteristics, namely, energy constraints, design-time specialization, and low communication latency. Physical layer signaling techniques for lossy transmission lines have been studied for a long time by high-speed board designers and microwave engineers. Current and future systems on chip will be highly programmable, and therefore their power consumption will critically depend on software aspects. Most of the system software runs on the control processor, which orchestrates the system activity and farms off computationally intensive tasks to domain-specific coprocessors. The chapter considers a few specific instances of energy-efficient, micro-network design problems. At the physical layer, low-swing signaling is actively investigated to reduce communication energy on global interconnects. At the data-link layer, a key challenge is to achieve the specified communication reliability level with minimum energy expense.
