ABSTRACT
The demand for high-speed wireless and fiber-optic communications has pushed the development of
SiGe and SiGeC epitaxial base processes into the flow of CMOS mainstream technologies. This
combination of narrow base width, due to epitaxial growth techniques, and lateral footprint reduction,
due to the utilization of advanced CMOS lithography, has resulted in a tremendous performance boost
of Si-based bipolar transistors (e.g., Chapter 3 and Ref. [1]). In order to capture the resulting new
electrical and physical effects occurring in such technologies, improved compact models have been
developed such as the HIgh-CUrrent Model (HICUM) [2-4], that provide the capability of accurately
predicting circuit performance. This capability has become extremely important due to the soaring mask
cost, which can run as high as US$ 1 million for a 0.1 mm-BiCMOS process. Thus, saving just one design
cycle and its associated mask cost quickly pays off any model development and support cost.
