ABSTRACT
Chip-package codesign refers to design scenarios in which the design of the chip impacts the package design or vice versa. Computer aided tools are needed for codesign in situations where simple bookkeeping is insufficient. However, the need for more sophisticated tools for chip-package codesign is rapidly appearing. High-frequency designs require more accurate modeling of the chip and package components. The chapter looks at digital codesign and mixed-signal codesign. It provides a brief overview of the most successful codesign tool to date, the input/output (I/O) buffer interface standard (IBIS) macromodeling language. The IBIS has been a highly successful technique to macromodel I/O buffers. Although an accurate count of the number of users is not available, a web search shows over 800 companies using IBIS and over 1000 users have downloaded the newest version of the SPICE to IBIS tool. Traditionally when one refers to electronic design automation tools for chip package codesign, modeling tools are usually implied.
