ABSTRACT
The roots of logic synthesis can be traced to the treatment of logic by George Boole, in what is termed Boolean algebra. The applications for logic synthesis lay primarily in digital computer design. IBM and Bell Laboratories played a pivotal role in the early automation of logic synthesis. The goal of behavioral synthesis is to transform a behavioral hardware description language specification into a register transfer level specification, which can be used as input to a gate-level logic synthesis flow. The Olympus system combines behavioral and logic synthesis. Two-level logic minimization is arguably the workhorse of logic synthesis. Its early and most direct application included logic minimization for Programmable Logic Array (PLA)-based designs. Sets of pairs of Functions to be Distinguished (SPFD)-based optimizations have been demonstrated in other contexts as well, including rewiring, power, and delay minimization for Field-Programmable Logic Array synthesis, wire removal for PLA networks using multivalued SPFDs, and topologically constrained logic synthesis.
