ABSTRACT
Around 1980, designers realized that the complexity of chips in the decade to come forced them to use more than just a router and occasionally a placer to find a starting point. The salient feature of floorplans is that they allow designers to perform early analysis on their design decisions so that performance can be improved without resorting to lengthy iterations. In a sense, floorplanning is simply a generalization of placement. The terminology, the creation, and the use of module environments, and the explicit mention of hierarchy in the last item, seems to bind floorplanning exclusively to hierarchical design. With wiring as the main closure problem of the 1980s, timing closure became the target of the next decade. A wireplan is an incidence structure of modules and global wires. A global wire is one that can be sped up by buffer insertion.
