ABSTRACT
This chapter introduces video applications and some system-on-chip (SoC) architecture that may be the targets of system-level design tools. It discusses models of computation and languages for system-level modeling. The chapter outlines simulation technique and deals with a discussion of hardware/software codesign. It reviews the basic characteristics of video compression algorithms and the implications for video SoC design. The chapter also reviews several SoCs, including some general-purpose SoC architectures as well as several designed specifically for multimedia applications. Communications and networking are the other areas in which SoCs provide cost/performance benefits. Many SoCs are heterogeneous multiprocessors and the architectures designed for multimedia applications are no exceptions. System-on-chip designers use simulation to measure the performance and power consumption of their SoC designs. Functional validation, performance analysis, and power analysis of SoCs require simulating large number of vectors. Video and other SoC applications allow complex input sequences.
