ABSTRACT
This chapter presents several alternative complementary metal-oxide-semiconductor field-effect transistor (CMOS) logic structures, which include open-drain circuits, pseudo-nMOS circuits, dynamic circuits, and BiCMOS circuits. Removing one of the switch networks in a complementary logic circuit results in an open-drain logic circuit. One unique property of pseudo-nMOS logic is its capability of forming hardwired logic by connecting the outputs of two or more logic circuits together. A low signal on the request line indicates that one or more service requester has turned on its output transistor that pulls down the request line. The simplest domino solution to the cascading problem of dynamic logic circuits is to add a static inverter at the output of a dynamic logic stage. Two dynamic D-latches can be cascaded into a master-slave type edge-triggered D-flip-flop. The minimum operating frequency is determined by the storage node with the smallest capacitance value.
