ABSTRACT

SiC grains have been formed in Si under a SiO2 capping layer by annealing in a CO atmosphere. The method provides cubic SiC grains which are epitaxial to the silicon substrate on both (100) and (Ill) oriented Si wafers. The surface area covered by SiC is determined for samples annealed for different times by transmission electron microscopy on plan-view samples. There are great possibilities in the integration of SiC and Si technologies. Although many techniques have been tried most of them produce voids at the Si/SiC interface. An amorphous band was found at the SiC/Si interface in sample C. The chapter shows that epitaxial SiC grains are formed in Si due to annealing in a CO environment. The grain size of the formed SiC and the Si percent coverage by SiC were determined for different annealing temperatures.