ABSTRACT
This chapter explores functional integration potentials at the chip and packaging levels. It describes potential impacts of SUM devices for future system designs and memory system architecture, leading to application potentials of SUM devices in current and future digital systems. SUM is an evolutionary progression of silicon based NVM technology which has already adopted concepts of band engineering and high K dielectric films for NROM and NAND products. SUM chip-level integration has the unique advantage of successfully incorporating and integrating advances in scaled CMOS technology features from SOC platform technology for the past and present technology nodes. SUM devices could potentially serve as catalyst to provide unified advanced memory systems and sub-systems for current and future applications of digital electronics. Application of USUM and FSUM devices with optimized and advanced memory architecture has the potential to advance digital system capability by multiple orders of magnitude in system attributes.
