ABSTRACT
This chapter reviews the material properties of these layers and their significance on nonvolatile memories (NVMs) device characteristics. The gate stack layer of the NVM device with the associated dielectric layers and interfaces can be depicted in terms of the energy band diagram identifying the different elements in the stack design. In general, gate materials employed for NVM devices are required to be CMOS technology compatible. Gate materials employed in NVM device elements are rarely different from PFET and NFET CMOS gates due to technology scalability considerations and process integration requirements. Typically, CMOS technology had employed either N-doped or P-doped polysilicon gates in the past, which are being progressively changed to metal gates for field effect transistor (FET) device scaling requirements. Aside from the polysilicon gates, the most common metal gates employed in NVM devices are metal nitrides, namely, TiN and tantalum nitride (TaN).
