ABSTRACT

Appendix B: Complex Time-Element Example 891 B.1 Word Description 891

Appendix C: Loss of Power Supply for Memory 891

Bibliography 892

5.2 LADDER DIAGRAMS 893

Introduction 893 Ladder Diagram Symbols 893 Developing a Ladder Diagram 894

Automatic Mode of Operation 895 Summary 895 Ladder Diagram Analysis 895 Start-Up and Shutdown 896

Dynamic Breaking of a Motor 896 Fail-Safe Design 897 Documentation 897 Conclusions 897 Bibliography 897

5.3 OPTIMIZATION OF LOGIC CIRCUITS 898

Optimization Building Blocks 898 Graphic Logic Functions 900 Ladder Diagrams from Logic Diagrams 901

Optimized Logic Circuit Construction 901 Logic Circuit Synthesis 902 Logic Simplification with Boolean Algebra 903 Logic Simplification through Logic Maps 903

Negative vs. Positive Logic Usage 904 Summary 904 Bibliography 905

5.4 PLCs: PROGRAMMABLE LOGIC CONTROLLERS 906

Introduction 907 History 907 PLC Sizes 909

Nano PLCs 909 Basic PLC Components 909

Central Processor Unit (Real Time) 910 Memory Unit 910 I/O Systems 912 PLC Power Supply 915

Additional PLC Components 915 Communications Modules 915 Remote I/O 915 Peer-to-Peer Communications 916 Peripheral Devices 917 Local Operator Interface 917 Human-Machine Interface 918 Printers 919

Programmers and Workstations 919 Justification for the Use of PLCs 920

PLCs vs. Relays and Stand-Alone Controllers 920

PLC vs. DCS 921 PLC vs. Personal Computers 922

Summary 922 Project Execution 923

Systems Analysis 923 Open Systems 925 PLC Hardware, System Sizing,

and Selection 926 PLC Installation and Panel Design 928 Software (Program) Development 932 Software/Hardware Integration 938 System Checkout and Start-Up 939 After Start-Up 939

Conclusion 940 References 940 Bibliography 941

5.5 PLC PROGRAMMING 944

Introduction 944 What Is a PLC? 944

System Hardware and Operation 944 Programming Languages 946

Instruction List 946 Structured Text 946 Sequential Function Charts 946 Function Block Diagrams 947

Ladder Logic Programming 947 Ladder Logic Structure 947 Ladder Logic Programming Basic

Instructions 948 Memory Structure 952 Ladder Logic Programming Devices 953 Programming Considerations 953 Program Documentation 954 PLC Hardware Configuration 954

Ladder Program Structure 955 Typical GE Fanuc PLC 955 Typical Allen-Bradley PLCs 956 Typical Modicon PLC 984 958 Access and Programming Modes 958 Developing the PLC Program Logic 960

Testing and Simulation 962 Advances in Programming 964 Reference 965 Bibliography 965

5.6 PLC SOFTWARE ADVANCES 966

Introduction 966 Graphic Description of Control Requirements 966

Ladder Logic Advances 968 Program Flow Modification 968 Indirect Addressing 969 Assembly Language-Like Extensions 971 Communication with Intelligent Devices 971 Fast I/O Updating Methods 972

Graphic, Flowchart-Like Languages 972 IEC 61131-3 PLC Language Standard 973 Conclusion 974 References 974 Bibliography 975

5.7 PRACTICAL LOGIC DESIGN 976

Design Philosophy 976 Open/Close Valves 976

Definitions 976 Auto Mode 978 Motor-Operated Valves 979 Failure Logic 979 Solenoid Valves 981

Pumps 981 Definitions 981 Auto Mode 983 Pump Fail 984 Other Common Problems with Pump Logic

Design 984 Pumps with Two Outputs 984 Controlling Two Pumps Together 984

Breakers 986 Analog Controls 986

Switchover 986 Pop Open/Clamp Closed 986 Override Open and Close 988 Feedforward 988 Cascade 989 Three-Transmitter Select 989 Switch to Manual Mode 990 Changing the Set Point with Changes in

the Number of Pumps Running 990 Start-Up and Shutdown Sequences 990 Operation and Customization 992 A Note on Safety 992 Bibliography 992

5.8 PROGRAMMABLE SAFETY SYSTEMS 993

Introduction 993 Risk Reduction 994 History 994

Safety Standards 996 IEC 61508: General Safety Standard 996 IEC 61511: Safety Standard for Process

Industries 996

ANSI/ISA-84.01 Standard 997 Management Considerations 999 Hazard and Risk Analysis 999

As Low as Reasonably Practicable (ALARP) 999

Required Safety Integrity Level 999 Semi-Quantitative Risk Analysis Techniques 1001 Risk Graphs 1001

Safety System Certification 1001 Major Trends 1003

Overall Safety 1003 Separation from the Control System 1003 Flexibility and Scalability 1003 Function Blocks 1004

Safety System Selection 1004 Acknowledgments 1004 Acronyms 1004 References 1005 Bibliography 1005

5.9 RELAYS 1006

Introduction 1007 Relay Types and Features 1007

Special Relays 1007 Relay Characteristics 1008 Rating, Size, and Other Selection Criteria 1008 Contact Configurations 1008 Mechanical Structures 1009 Contact Materials 1010 Contact Shape and Mounting 1011

Selection and Application 1011 Selection 1011

Relative Costs 1012 Relays vs. Solid-State Devices 1012 Electromechanical Advantages 1012 Solid-State Advantages 1013

Conclusions 1013 Bibliography 1013

5.10 SOLID-STATE LOGIC ELEMENTS 1015

Introduction 1015 Analog Circuit Elements 1016

Transistor Switch 1016 Diodes and Their Switching 1017 Transistors 1017

Integrated Circuit Elements 1018 Families of IC Switching 1018

Applications 1020 Merging Human and Instrument Inputs 1020 Time Synchronization 1020

Implementation Options 1021 Solid-State Logic Options 1021

Bibliography 1022

5.11 SYSTEM INTEGRATION: COMPUTERS WITH PLCS 1023

Introduction 1023 PCs for Programming the PLC 1024 PCs for Monitoring and Supervising

the PLC 1024 SCADA System 1024 Handling of Tasks 1025

Implementation 1025 Serial Link 1025 Communication Networks 1025

Performance 1027 Generation Time (

Tg

) 1027 Transmission Time (

Tt

) 1027

Te

,

Tr

, and

Trd

1028 Conclusions 1028 References 1028 Bibliography 1028

5.12 TIME DELAY RELAYS 1030

General Characteristics 1031 Timer Modes and Characteristics 1031 Types of Time Delays 1032 Types of Designs 1033

Bibliography 1035

5.13 TIMERS AND PROGRAMMING TIMERS 1036

Introduction 1036 Mechanical Timers and Sequencers 1036

Cam Timers 1036 Band or Drum Programmers 1037 Punched-Card Programmers 1037

Timers 1037 One-Shot Timers 1037 Monostable and Astable Designs 1037 Delay on Break 1038 555 Devices 1039 Hybrid Timing Circuits 1039

Digital Sequencers 1040 Asynchronous Sequencers 1041

Electronic Sequencers 1042 Conclusions 1042 Bibliography 1042

1. PURPOSE

1.1

The purpose of this Standard is to provide a method of logic diagramming of binary interlock and sequencing systems for the start-up, operation, alarm, and shutdown of equipment and processes in the chemical, petroleum, power generation, air conditioning, metal refining, and numerous other industries.