ABSTRACT
This chapter focuses on general methodologies for clock-accurate system-level modeling and performance evaluation and design space exploration, a key process to enhancing design quality. It outlines SystemC-based system-level modeling objects, such as module, clock, intramodule memory, intramodule synchronization, and intermodule communication channels, and outlines back-annotation of different operational characteristics of system-level models, focusing on time annotation. The chapter discusses examples of system-level modeling and related back-annotation issues. It considers time annotation of clock-accurate models by providing an example based on processor architectures. The chapter argues that system-level modeling methodologies for collecting performance statistics from modeling objects, including automatic extraction of statistical properties. It examines the design of integrated system-level tools, generating, processing, presenting, and disseminating system monitoring information. The chapter describes open system-level modeling issues, such as asynchronous processing, parallel and distributed system-level simulation, and interoperability with other design tools. System modeling methodology is a combination of stepwise protocol refinement, hierarchical modeling, orthogonalization of concerns, and communication layering techniques.
