ABSTRACT
This chapter presents the design methodology of high-performance, low-cost, special-purpose array processors. In systolic array processors, data must be fed into the system according to a carefully planned schedule. Vector and matrix operations are the cornerstone building blocks of many digital signal processing algorithms. The generation of a dependence graph is the next step after the code describing an algorithm is described as a single assignment code. Dependence graph is a tool for exploring the parallelism in an algorithm. The arcs in a data dependence graph describe the dependencies between operations. While the arc mapping can be carried out manually for a simple data dependence graph, a systematic approach is desirable for more complex operations to avoid the possibility of making errors. The wavefront array processor is a potential solution to the problems that come along with synchronous array processors. Wavefront processor uses the concept of a data-flow machine, which operates only after all operands have arrived.
