ABSTRACT
A 300-mm wafer-level three-dimensional integration (3DI) process using tungsten (W) through-silicon vias (TSVs) and hybrid Cu/adhesive wafer bonding is demonstrated. The W TSVs have fine pitch (5 mm), small critical dimension (1.5 mm), and high aspect ratio (17:1). A hybrid Cu/adhesive bonding approach, also called transfer-join (TJ) method, is used to interconnect the TSVs to a Cu BEOL in a bottom wafer. The process also features thinning of the top wafer to 20 mm and a Cu backside BEOL on the thinned top wafer. The electrical and physical properties of the TSVs and bonded interconnect are charaterized. The results show RLC values that satisfy both the power delivery and high-speed signaling requirements for high-performance 3D systems. A reliability evaluation of a 300-mm-compatible 3DI process is then presented. The interface bonding strength, deep thermal cycles test, temperature and humidity test, and ambient permeation oxidation all show favorable results, indicating the suitability of this technology for VLSI applications.
