ABSTRACT
For emitter-up HBTs (see, for example, Fig. 14.2) contact to the top is made first. This contact can be made with any commonly used metal system, such as Ti/Pt/Au or Au:Ge/Ni. Next, an emitter mesa is formed. The top low-resistivity layers are removed to expose the actual emitter layer that is going to form the ledge of the device. The etch depth must be controlled accurately so that the ledge layer is not disturbed. The details of this etch step and other etches used for the base contact are discussed in Chapter 7 in more detail. The second mesa or base pedestal is formed next by etching off the emitter AlGaAs or InGaP layer as well as some of the collector layer. The whole surface of the wafer, including the ledge, is covered by silicon nitride. The base pedestal is made deeper into the collector to make isolation by ion implantation easier, which can be done at this stage. See Fig. 14.2. Base contact areas are opened next in the nitride and then base contact metal is deposited. The base contact etch must also be controlled very precisely because the base layers are the thinnest. To make the collector contact the areas are defined and the collector layer is removed to make contact with the highly doped subcollector layer. The commonly used n-type contact scheme based on Au:Ge/Ni is utilized here. An alternative, more planar approach to make a base contact is to convert the n-type top layers to p-type layers with ion implantation [4] or diffusion of p-type dopants [5]. A schematic cross section of this approach is shown in Fig. 14.4. The dopant concentrations possible with p-type dopants can be very high, in the 1E20 range for Zn. The p-type dopants can be placed very close to the emitter. The combination of high doping and small spacing can result in low base resistance. The disadvantage of ion implantation is that annealing at high temperatures is required, which is not ideal for junction sharpness even if rapid thermal annealing is used. Also, in this process p-n junctions must not be made in the topmost InGaAs or GaAs layers, because these low-bandgap materials have low turn-on junctions and therefore would form parasitic junctions. So these layers should be removed. The isolation of devices can also be done by implantation damage with a more planar device of the type shown in Fig. 14.2 or 14.3. The mechanism and details of the ion implantation process are discussed in Chapter 3. Historically, boron, oxygen,
and hydrogen have been tried. All can convert the semiconductor layers to resistivity of 1E7 ohm.cm, with some thermal treatment after the implant. Boron cannot go too deep and hydrogen has the disadvantage of diffusing around. A very-high-energy ion implanter would be needed with boron or oxygen, so these are good for shallow layer isolation. Helium ion implantation is practical with a 400 keV implanter. A combination of mesa etching and ion implantation can be made to work for a variety of HBT structures. High power, high frequency and low parasitic requirements make mesa isolation more desirable. The isolation resistance achieved by the mesa can be higher than what is possible with ion implantation. A large number of HBT processes used in different companies for microwave products are based on this basic, emitter-up, mesa-isolated structure. These devices are used in the common emitter mode, where the emitters are connected to the ground plane on the backside of the wafer and the collectors are connected together by a thick metal on the front.
