Historically, power consumption has been a secondary design consideration behind speed and area. However, with shrinking technology sizes and the rapid growth of portable electronic devices, power consumption can no longer be an afterthought-energy eﬃciency has become a critical aspect of digital circuit design. Traditionally, voltage scaling, a mechanism in which the supply voltage is varying and the threshold voltage is constant, has been an eﬀective solution in meeting stringent energy requirements. However, voltage scaling comes at a cost of reduction in performance. The limits of voltage scaling, and therefore energy minimization, can be explored by operating a circuit at subthreshold , which has been garnering more attention since Vittoz et al. demonstrated the breakthrough 0.95V subthreshold operation of a CMOS frequency divider with 2MHz performance .