The reduction of signal propagation delay is one of the driving forces behind the use of multilevel device structures and the principal one responsible for the search for improved materials with which to build them. The dielectric layers, the essential insulating components of a multilevel structure, contribute to the delay (RC) through the capacitance term, ε/d, where ε is the dielectric constant of the insulator and d is its thickness. Many recent papers use k as the symbol for the dielectric constant rather than ε. The total capacitance is due to the capacitance (1) between the first-level wires and the Si substrate, (2) between wires on the same level, and (3) between wires on successive levels. While a thick insulator would reduce the capacitance between levels, there are limits due to processing difficulties such as via hole etching and step coverage and/or hole filling capabilities. Also, thicker interlevel insulators increase the intralevel capacitance for a given line-to-line spacing, i.e., the cross-talk between conductors in hole level. Thus, the insulators best suited for the interlevel dielectric layers are those with a low dielectric constant. This chapter discusses both inorganic and organic insulators; SOGs, are also included, as they bridge the gap between both types.