ABSTRACT
Over past several years in VLSI fabrication, the chip size has been reduced dramatically. As the technology scales down, the miniaturization of CMOS circuits leads to sub-threshold effects with increased fabrication cost. Quantum dot Cellular Automata (QCA) is one of the nanotechnologies which can overcome these difficulties. This technology is best suited for producing low power, high performance and dense structures. This work deals with analysis and design of a binary adder-Subtractor. The design layout and simulations were done using QCA Designer tool. The simulation results show that the design can perform both addition and subtraction operations, by occupying lesser area and reducing delay considerably.
