When the Physical Disorder of CMOS Meets Machine Learning

This chapter briefly describes the sources of process variations, i.e., physical disorder in modern complementary metal-oxide-semiconductor (CMOS) circuits. An introduction to common physically unclonable function (PUF) terminologies and performance metrics used throughout this chapter is provided. It gives a brief overview of some of the most popular silicon-based PUF circuits along with their performance metrics. Next, a machine learning modeling method is reviewed as a threat in attacking PUFs. Our discussion continues on applying machine learning techniques to help with understanding and mitigating the physical disorder of CMOS circuitry. More specifically, machine learning techniques can also be employed in a constructive way to improve the reliability of PUFs and the resolution of time-to-digital converters (TDCs).