ABSTRACT
With the advent of increased computations, there is an expansion in the amount of data that must be stored and transmitted. This growth has led to a need to compress data. Less storage space and memory are required to store the compressed data. Transferring compressed files is easier and faster. Compression also results in reduction in cost for network bandwidth. In high speed applications, data is sampled at a faster rate. In order to compress this data, fast data compression system is desired. Software methods are often not fast enough. The idea is to design a dedicated hardware for compressing data on Field Programmable Gate Array (FPGA) with the help of hardware description language - Verilog. This paper presents a lossless compression technique - Lempel-Ziv-Welch (LZW). This technique is used for text compression and has very high throughput in hardware implementations. The results obtained after testing with various text files using Xilinx ISE tool shows that the proposed system works with good accuracy without any complex structure and gives a compression ratio of about 1.5:1, which can be further improved to get better compression.
