ESD Design and Optimization in Advanced CMOS SOI Technology
This chapter discusses two types of primary electrostatic discharge (ESD) protection devices used in silicon-on-insulator (SOI) technology: the ESD diode and silicon-controlled rectifier (SCR). It explains the ESD performances dependency on design parameters, junction formations, and processes. SOI technology has proven to be attractive for high-performance, high-frequency circuits design because of its performance advantages over similar bulk complementary metal oxide semiconductor (CMOS) technologies. The effect of anode-to-cathode spacing (SAC) in SOI diode is consistent with the trend of bulk diode design, increasing the SAC results in a slightly decreasing of failure current and significant on-resistance increase of the gate-bounded SOI diode. In general, the triggering of native SCR devices are breakdown dominated, and the trigger voltages are too high for circuits designed in advanced CMOS technologies. Therefore, the external triggering techniques are usually integrated into main SCR to reduce the trigger voltage down to an acceptable level. The typical triggering circuits include a diode string and an RC network.